arun's projects

Looking at this picture you may wonder what research interests I could possibly have??? But hey, don't go by what u see.....I may like to play Tarzan but I like other stuff too.

stuff about phd coming soon

Projects done during the course of my Master's study at UF

1. Master's Thesis: DEAR: A Device and Energy Aware Routing Protocol for Heterogeneous Wireless Ad Hoc Networks. This work was supervised by Dr.Yuguang Fang. We developed a routing protocol for ad hoc networks which exploited the fact that some nodes in the network may be powered. These powered nodes can boost their transmit power and essentially deliver messages to their destination in one hop. The nodes try to route most of the messages through the powered nodes while at the same time trying to distribute the dissipation of battery resources uniformly throughout the network. This protocol is compared to traditional energy aware routing schemes and other routing protocols for ad hoc networks like AODV, DSR WRP and distributed Bellman-Ford. Conventional energy aware protocols fail to provide any increase in system lifetime when the nodes are mobile whereas DEAR works well in a mobile environment and increases the system lifetime when compared to conventional protocols. Click here to download my thesis.

2. EEL 6503:Spread Spectrum and CDMA course project: Linear and Adaptive Linear Multiuser Detection in CDMA systems. Check the software, tutorial and downloads page for more information.

3. Summer 2000 Independent Study: Low Density Parity Check Codes. This work was supervised by Dr.John Shea. Check the software, tutorial and downloads page for more information.

4. EEL 6322 :Advanced VLSI course project: A Variable Rate Programmable Turbo Encoder. Scaled Down custom design of a Turbo encoder that is capable of operating at two different code rates (1/2 and 1/3). The block size is fixed at 128 bits and a random interleaver is hardwired in the circuit. The user can program the feedback and feed- forward polynomials of the constituent convolutional encoders by using the select lines provided. The chip is capable of on-the-fly reconfiguration of the constituent encoders and it is also capable of operating at a reduced Vdd of 3V. A built in self test checks the trellis termination of the encoder. Click here for the project report (contains schematics, simulation results, layout, floor plan and application notes).
Chip Specifications:
- Design Process: Hewlett Packard (HP) AMOS14TD process - 0.5m feature size
- Number of pins: 30
- Cost per Chip: 95.71 cents (selling price with a 40% profit)
- Area of Chip (with pads):1.52mm x 1.068mm
- Input/Output bus width: 1 bit (bit stream input and output)
- Select (lines) bus width: 7 bits per encoder
- Maximum clock frequency:12.8MHz
- Supply Voltage: 3-5V
- Operating temperature range: 0-80 oC
5. EEL 5322: VLSI Circuits and Technology course project: 36 bit SRAM Design. Custom design and layout of a baby SRAM circuit. click here for the project report.

Some Undergrad (Ad)Ventures:

I did my Bachelor's study in the School of Electronics and Communication Engineering at Anna University in India.

1.My Bachelor's thesis: "JITTER ANALYSIS IN ATM NETWORKS HANDLING SELF-SIMILAR TRAFFIC".
My undergrad. thesis combined two aspects of research going on in the field of ATM networks during the late 1990's namely : Jitter Analysis and Self-Similar Traffic. Traditionally Jitter Analysis was performed on networks in which the traffic was assumed to be of Poisson nature. But pioneering research by Willinger et al brought out the fractal or self-similar nature of Ethernet traffic. Subsequent research proved that even ATM networks handled Self-Similar Traffic. Thus, two of my friends and I tried to develop a mathematically tracatable approximation of the self-similar behavior. We propose a heavy tailed distribution called the 2-parameter discrete Pareto (2-PDP) process. This is used as the density function of the self-similar arrival process. The 2-PDP has two parameters that can be varied to generate self-similar arrivals with any mean and any hurst parameter. Simulation results show that this approximates self-similar arrivals for a certain range of the hurst parameter. We then use this density function and perform jitter analysis on an ATM network handling self-similar traffic. We consider a tagged periodic stream(CBR) multiplexed with background traffic that is of fractal nature flowing through an ATM network and studied the jitter in the tagged stream. The buffer overflow probability is calculated theoretically using the 2-PDP and also through simulation of the above mentioned scenario. The theoretical and experimental values are then compared. Click here for more details.
2. A friend and I developed a new technique for cleaning images corrupted with pepper noise. We called this method MEDIAN AUGMENTATION". This is actually a good example of serendipity wokring overtime. My friend and I were actually working on our homework assignment for a digital image processing course and while doing our matlab simulation..we made a mistake in our code and it actually produced much better results than it was supposed to. We then went back looked at the bug in the code, figured out what it was doing and generalized it and voila: Median augmentation was born. This paper won the 2nd prize in an All India Paper presentation competition held by the Indian Institute of Technology , Madras. It also won the first prize in several other paper presentation competetions in India. Click here for more details.
3.Other miscellaneous projects done during my undergrad years.

STOCK PREDICTION FOR DUMMIES: Used MATLAB to model the variations in stock prices of selected companies and proposed a method for Stock Market Speculation for novices. This was a term project for a course in Industrial Economics....jeez...i hated that class!!!
DREAM HOUSE: A Hardware/Software project where appliances like the lights, fans and air- conditioners are controlled by a computer receiving inputs from strategically placed sensors.
HEAD COUNT : Built an infrared-eye based circuit that maintains an accurate count of people in a room.
NETLAB 1.0: Designed a GUI based software for the analysis of planar/non-planar electric circuits having active/passive elements. Features: customizable user screen and freq. response
IP over ATM: A very basic introduction to the OVERLAY and PEERING Models used to implement IP over ATM is given in this report that I prepared. (I'll put up the link soon.). This was a term paper that counted towards partial fulfillment of a "LAN/WAN" course I had registered for.